HEADER {
	INLIB  = ../source/Johnson_count.gds
	OUTLIB = ../results/TOPCELLNAME_err
	BLOCK = Johnson_count
	FORMAT = GDSII
	OUTPUT_FORMAT = LTL
	OUTPUT_LAYOUT_PATH = ../results/
	RUN_DETAILS_DIR = ../results/TOPCELLNAME.run_details
	SCHEMATIC = ../source/Johnson_count.sp
	SCHEMATIC_FORMAT = SPICE
}
OPTIONS {
	AUTO_SCHEMATIC_GLOBAL_ON=TRUE
	ERR_PREFIX = ERR
	GDSIN_OPTIONS= "-nl"
	IGNORE_CASE=TRUE
	LAYOUT_GROUND = { VSS VSS12 VSS25 }
	LAYOUT_POWER = { VDD VDD12 VDD25 }
	MAXIMUM_CELLNAME_LENGTH = 127
	MESSAGE_ERROR = { CMP-40 CMP-41 }
	NET_PREFIX = N_
	NETTRAN_OPTIONS= " -mprop "
	PRINT_ERRSUM_FILE=TRUE
	PROTOTYPE_PLACEMENTS = FALSE
	RESOLUTION=0.001
	SCHEMATIC_GROUND = { VSS VSS12 VSS25 }
	SCHEMATIC_POWER = { VDD VDD12 VDD25 }
	IUO_DEVICE_NAME_LIST = { N12, P12, N25, P25, N12_LVT, P12_LVT, N12_HVT, P12_HVT, RPPOLY, RNPOLY, RPPOLY_WOS, RNPOLY_WOS, RM1, RM2, RM3, RM4, RM5, RM6, RM7, RM8, RM9, ND, PD }
	IUO_SNAP_VALUES = [ 0.001 ]
}
EVACCESS_OPTIONS {
	PATH = /remote/SCRATCH_fs01/ANI_AL/Ani/fullflow/hercules/lvs/results/TOPCELLNAME.run_details/evaccess
	LIBRARY = Johnson_count
	CREATE_VIEWS = TRUE
}
ASSIGN { 
	NWELLi	(1)
	DNWi	(2)
	DIFFi	(3)
	DDMYi	(3;1)
	PIMPi	(4)
	NIMPi	(5)
	DIFF_25i	(6)
	PADi	(7)
	ESD_25	(8)
	SBLKi	(9)
	POi	(10)
	PODMYi	(10;1)
	M1i	(11)	text(11)
	M1DMYi	(11;1)
	M2i	(12)	text(12)
	M2DMYi	(12;1)
	M3i	(13)	text(13)
	M3DMYi	(13;1)
	M4i	(14)	text(14)
	M4DMYi	(14;1)
	M5i	(15)	text(15)
	M5DMYi	(15;1)
	M6i	(16)	text(16)
	M6DMYi	(16;1)
	M7i	(17)	text(17)
	M7DMYi	(17;1)
	M8i	(18)	text(18)
	M8DMYi	(18;1)
	M9i	(19)	text(19)
	M9DMYi	(19;1)
	COi	(20)
	VIA1i	(21)
	VIA2i	(22)
	VIA3i	(23)
	VIA4i	(24)
	VIA5i	(25)
	VIA6i	(26)
	VIA7i	(27)
	VIA8i	(28)
	HVTIMPi	(29)
	LVTIMPi	(30)
	M1PIN	(31)	text(31)
	M2PIN	(32)	text(32)
	M3PIN	(33)	text(33)
	M4PIN	(34)	text(34)
	M5PIN	(35)	text(35)
	M6PIN	(36)	text(36)
	M7PIN	(37)	text(37)
	M8PIN	(38)	text(38)
	M9PIN	(39)	text(39)
	HOTNWLi	(41)
	DIODi	(43)
	BJTDMYi	(44)
	RNWi	(45)
	RPOLYi	(46)
	RDIFFi	(47)
	LOGO	(48)
	IP	(49;49)	text(49;49)
	RM1i	(51)
	RM2i	(52)
	RM3i	(53)
	RM4i	(54)
	RM5i	(55)
	RM6i	(56)
	RM7i	(57)
	RM8i	(58)
	RM9i	(59)}
CONNECT {
	ptap pwell BY [ OVERLAP TOUCH ] pwell_cont
	ntap nwnr BY [ OVERLAP TOUCH ] nwell_cont
	m1 nsd BY [ OVERLAP TOUCH ] codiff
	m1 psd BY [ OVERLAP TOUCH ] codiff
	m1 ntap BY [ OVERLAP TOUCH ] codiff
	m1 ptap BY [ OVERLAP TOUCH ] codiff
	ngate_12 BY [ OVERLAP TOUCH ] ponr
	pgate_12 BY [ OVERLAP TOUCH ] ponr
	ngate_25 BY [ OVERLAP TOUCH ] ponr
	pgate_25 BY [ OVERLAP TOUCH ] ponr
	ngate_12_lvt BY [ OVERLAP TOUCH ] ponr
	pgate_12_lvt BY [ OVERLAP TOUCH ] ponr
	ngate_12_hvt BY [ OVERLAP TOUCH ] ponr
	pgate_12_hvt BY [ OVERLAP TOUCH ] ponr
	m1 ponr BY [ OVERLAP TOUCH ] copoly
	m2 m1 BY [ OVERLAP TOUCH ] via1
	m3 m2 BY [ OVERLAP TOUCH ] via2
	m4 m3 BY [ OVERLAP TOUCH ] via3
	m5 m4 BY [ OVERLAP TOUCH ] via4
	m6 m5 BY [ OVERLAP TOUCH ] via5
	m7 m6 BY [ OVERLAP TOUCH ] via6
	m8 m7 BY [ OVERLAP TOUCH ] via7
	m9 m8 BY [ OVERLAP TOUCH ] via8
} CONNECT_DB = __CONNECT_DB_yTady__0001
CONNECT {
	m1pin_marker BY [ OVERLAP TOUCH ] m1
	m2pin_marker BY [ OVERLAP TOUCH ] m2
	m3pin_marker BY [ OVERLAP TOUCH ] m3
	m4pin_marker BY [ OVERLAP TOUCH ] m4
	m5pin_marker BY [ OVERLAP TOUCH ] m5
	m6pin_marker BY [ OVERLAP TOUCH ] m6
	m7pin_marker BY [ OVERLAP TOUCH ] m7
	m8pin_marker BY [ OVERLAP TOUCH ] m8
	m9pin_marker BY [ OVERLAP TOUCH ] m9
} CONNECT_DB = __CONNECT_DB_yTady__0002
NMOS n12 ngate_12 nsd nsd pwell { 
} TEMP=generated_output_layer
PMOS p12 pgate_12 psd psd nwnr { 
} TEMP=generated_output_layer
NMOS n25 ngate_25 nsd nsd pwell { 
} TEMP=generated_output_layer
PMOS p25 pgate_25 psd psd nwnr { 
} TEMP=generated_output_layer
NMOS n12_lvt ngate_12_lvt nsd nsd pwell { 
} TEMP=generated_output_layer
PMOS p12_lvt pgate_12_lvt psd psd nwnr { 
} TEMP=generated_output_layer
NMOS n12_hvt ngate_12_hvt nsd nsd pwell { 
} TEMP=generated_output_layer
PMOS p12_hvt pgate_12_hvt psd psd nwnr { 
} TEMP=generated_output_layer
RES rppoly ppores ponr ponr { 
} TEMP=generated_output_layer
RES rnpoly npores ponr ponr { 
} TEMP=generated_output_layer
RES rppoly_wos ppores_sblk ponr ponr { 
} TEMP=generated_output_layer
RES rnpoly_wos npores_sblk ponr ponr { 
} TEMP=generated_output_layer
RES rm1 m1res m1 m1 { 
} TEMP=generated_output_layer
RES rm2 m2res m2 m2 { 
} TEMP=generated_output_layer
RES rm3 m3res m3 m3 { 
} TEMP=generated_output_layer
RES rm4 m4res m4 m4 { 
} TEMP=generated_output_layer
RES rm5 m5res m5 m5 { 
} TEMP=generated_output_layer
RES rm6 m6res m6 m6 { 
} TEMP=generated_output_layer
RES rm7 m7res m7 m7 { 
} TEMP=generated_output_layer
RES rm8 m8res m8 m8 { 
} TEMP=generated_output_layer
RES rm9 m9res m9 m9 { 
} TEMP=generated_output_layer
DIODE ND ndiffdio nsd pwell { 
	DIODE_TYPE=NP;
} TEMP=generated_output_layer
DIODE PD pdiffdio psd nwnr { 
	DIODE_TYPE=PN;
} TEMP=generated_output_layer
EQUATE NMOS n12=n12 GATE SRC DRN BULK { 
}
EQUATE PMOS p12=p12 GATE SRC DRN BULK { 
}
EQUATE NMOS n25=n25 GATE SRC DRN BULK { 
}
EQUATE PMOS p25=p25 GATE SRC DRN BULK { 
}
EQUATE NMOS n12_lvt=n12_lvt GATE SRC DRN BULK { 
}
EQUATE PMOS p12_lvt=p12_lvt GATE SRC DRN BULK { 
}
EQUATE NMOS n12_hvt=n12_hvt GATE SRC DRN BULK { 
}
EQUATE PMOS p12_hvt=p12_hvt GATE SRC DRN BULK { 
}
EQUATE RES rppoly=rppoly A B { 
}
EQUATE RES rnpoly=rnpoly A B { 
}
EQUATE RES rppoly_wos=rppoly_wos A B { 
}
EQUATE RES rnpoly_wos=rnpoly_wos A B { 
}
EQUATE RES rm1=rm1 A B { 
}
EQUATE RES rm2=rm2 A B { 
}
EQUATE RES rm3=rm3 A B { 
}
EQUATE RES rm4=rm4 A B { 
}
EQUATE RES rm5=rm5 A B { 
}
EQUATE RES rm6=rm6 A B { 
}
EQUATE RES rm7=rm7 A B { 
}
EQUATE RES rm8=rm8 A B { 
}
EQUATE RES rm9=rm9 A B { 
}
EQUATE DIODE ND=ND CATHODE ANODE { 
}
EQUATE DIODE PD=PD ANODE CATHODE { 
}
